Strain Engineering for Future CMOS Technologies
نویسندگان
چکیده
TCAD tools have been used to study the influence of both the uniaxial (process-induced) and biaxial (substrate-induced) strain on nanoscale MOSFETs down to 45 nm gate length. Processinduced stress has been introduced using SiGe, SiGeC, and SiC in the source/drain regions. Scalability of strained-Si MOSFETs and SPICE parameter extraction by combining TCAD and BSIM3 model are presented for the first time.
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تاریخ انتشار 2005